LTC4060 [Linear Systems]
Standalone Linear NiMH/NiCd Fast Battery Charger; 独立线性镍氢/镍镉电池快速充电器
| 型号： | LTC4060 |
| 厂家： | 
Linear Systems |
| 描述： | Standalone Linear NiMH/NiCd Fast Battery Charger |
| 文件： | 总20页 (文件大小：189K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC4060
Standalone Linear NiMH/NiCd
Fast Battery Charger
U
FEATURES
DESCRIPTIO
TheLTC®4060isacompletefastchargingsystemforNiMH
or NiCd batteries. Just a few external components are
needed to design a standalone linear charging system.
■
Complete Fast Charger Controller for Single,
2-, 3- or 4-Series Cell NiMH/NiCd Batteries
■
No Firmware or Microcontroller Required
■
Termination by –∆V, Maximum Voltage or
An external PNP transistor provides charge current that is
userprogrammablewitharesistor.Asmallexternalcapaci-
tor sets the maximum charge time. No external current
senseresistorisneeded,andnoblockingdiodeisrequired.
Maximum Time
■
No Sense Resistor or Blocking Diode Required
■
Automatic Recharge Keeps Batteries Charged
■
Programmable Fast Charge Current: 0.4A to 2A
■
■
The IC automatically senses the DC input supply and bat-
tery insertion or removal. Heavily discharged batteries are
initiallychargedataC/5ratebeforeafastchargeisapplied.
Fastchargeisterminatedusingthe –∆Vdetectionmethod.
Backupterminationconsistsofaprogrammabletimerand
batteryovervoltagedetector.AnoptionalexternalNTCther-
mistor can be used for temperature-based qualification of
charging. An optional programmable recharge feature au-
tomatically recharges batteries after discharge.
Accurate Charge Current: ±5% at 2A
Fast Charge Current Programmable Beyond 2A with
External Sense Resistor
■
■
■
■
■
■
■
■
■
Automatic Detection of Battery
Precharge for Heavily Discharged Batteries
Optional Temperature Qualified Charging
Charge and AC Present Status Outputs Can Drive LED
Automatic Sleep Mode with Input Supply Removal
Negligible Battery Drain in Sleep Mode: <1µA
Manual Shutdown
ManualshutdownisaccomplishedwiththeSHDNpin,while
removinginputpowerautomaticallyputstheLTC4060into
sleepmode.Duringshutdownorsleepmode,batterydrain
is <1µA.
Input Supply Range: 4.5V to 10V
Available in 16-LUead DFN and TSSOP Packages
APPLICATIO S
The LTC4060 is available in both low profile (0.75mm) 16-
pin 5mm × 3mm DFN and 16-lead TSSOP packages. Both
feature exposed metal die mount pads for optimum ther-
mal performance.
■
Portable Computers, Cellular Phones and PDAs
■
Medical Equipment
■
Charging Docks and Cradles
■
Portable Consumer Electronics
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
TYPICAL APPLICATIO
2-Cell, 2A Standalone NiMH Fast Charger with
Optional Thermistor and Charge Indicator
2-Cell NiMH Charging Profile
3.40
V
IN
= 5V
–∆V
TERMINATION
330Ω
V
CC
3.30
3.20
SHDN
ACP
“CHARGE”
NTC
CHRG SENSE
NTC
DRIVE
LTC4060
PROG
ARCT
SEL0
SEL1
BAT
TIMER
CHEM
PAUSE
+
NiMH
BATTERY
698Ω
1.5nF
3.10
0
10
20
30
40
50
60
GND
4060 TA01
CHARGE TIME (MINUTES)
4060 TA01b
4060f
1
LTC4060
W W
U W
ABSOLUTE MAXIMUM RATINGS
(Note 1)
VCC to GND ............................................... –0.3V to 11V
Input Voltage
SHDN, NTC, SEL0, SEL1, PROG, ARCT,
BAT, CHEM, TIMER, PAUSE ...... –0.3V to VCC + 0.3V
Output Voltage
CHRG, ACP, DRIVE ................... –0.3V to VCC + 0.3V
Output Current (SENSE) ...................................... –2.2A
Short-Circuit Duration (DRIVE) ...................... Indefinite
Operating Ambient Temperature Range
(Note 2) ............................................. – 40°C to 85°C
Operating Junction Temperature (Note 3) ........... 125°C
Storage Temperature Range
TSSOP Package............................... –65°C to 150°C
DFN Package .................................... –65°C to 125°C
Lead Temperature (Soldering, 10 sec)
TSSOP Package................................................ 300°C
U
W U
PACKAGE/ORDER INFORMATION
TOP VIEW
ORDER PART
NUMBER
ORDER PART
TOP VIEW
NUMBER
DRIVE
BAT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
DRIVE
BAT
1
2
3
4
5
6
7
8
16 GND
CHRG
15 CHRG
LTC4060EDHC
LTC4060EFE
SENSE
TIMER
SHDN
PAUSE
PROG
ARCT
V
SENSE
TIMER
SHDN
PAUSE
PROG
ARCT
14 V
CC
CC
ACP
13 ACP
12 CHEM
11 NTC
10 SEL1
17
17
CHEM
NTC
SEL1
SEL0
DHC PART
MARKING
FE PART
MARKING
9
SEL0
FE PACKAGE
16-LEAD PLASTIC TSSOP
DHC16 PACKAGE
16-LEAD (5mm × 3mm) PLASTIC DFN
4060
4060EFE
TJMAX = 125°C, θJA = 37°C/W
TJMAX = 125°C, θJA = 37°C/W
EXPOSED PAD (PIN 17) IS GND
MUST BE SOLDERED TO PCB TO OBTAIN
θJA = 37°C/W OTHERWISE θJA = 140°C
EXPOSED PAD (PIN 17) IS GND
MUST BE SOLDERED TO PCB TO OBTAIN
θJA = 37°C/W OTHERWISE θJA = 135°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VBAT = 2.8V, GND = 0V unless otherwise specified. All
currents into the device pins are positive and all currents out of the device pins are negative. All voltages are referenced to GND
unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Supply
CC
V
Operating Voltage Range (Note 4)
●
4.50
10
V
CC
I
V
Supply Current (Note 9)
I
= 2mA (R = 698Ω),
PROG
2.9
4.3
mA
CC
CC
PROG
PAUSE = V
CC
I
I
I
V
Supply Shutdown Current
SHDN = 0V
250
0
325
1
µA
µA
µA
V
SD
CC
Battery Pin Leakage Current in Shutdown (Note 5)
Battery Pin Leakage Current in Sleep (Note 6)
Undervoltage Lockout Exit Threshold
V
V
= 2.8V, SHDN = 0V
BAT
–1
–1
BSD
BSL
= 0V, V
= 5.6V
BAT
0
1
CC
V
SEL0 = 0, SEL1 = 0 and SEL0 = V
SEL1 = 0, V Increasing
,
,
●
●
4.25
4.36
4.47
UVI1
CC
CC
V
Undervoltage Lockout Entry Threshold
SEL0 = 0, SEL1 = 0 and SEL0 = V
4.15
4.26
4.37
V
UVD1
CC
SEL1 = 0, V Decreasing
CC
4060f
2
LTC4060
The ● indicates specifications which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VBAT = 2.8V, GND = 0V unless otherwise specified. All
currents into the device pins are positive and all currents out of the device pins are negative. All voltages are referenced to GND
unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
SEL0 = 0, SEL1 = V , V Increasing
MIN
6.67
6.57
8.28
8.18
TYP
6.81
6.71
8.47
8.37
100
MAX
6.95
6.85
8.65
8.55
UNITS
V
V
V
V
V
Undervoltage Lockout Exit Threshold
Undervoltage Lockout Entry Threshold
Undervoltage Lockout Exit Threshold
Undervoltage Lockout Entry Threshold
Undervoltage Lockout Hysteresis
●
●
●
●
V
V
UVI2
UVD2
UVI3
UVD3
UVH
CC CC
SEL0 = 0, SEL1 = V , V Decreasing
CC CC
SEL0 = V , SEL1 = V , V Increasing
V
CC
CC CC
SEL0 = V , SEL1 = V , V Decreasing
V
CC
CC CC
For All SEL0, SEL1 Options
mV
Charging Performance
I
I
I
I
I
High Fast Charge Current (Notes 7, 10)
Low Fast Charge Current (Note 7)
High Precharge Current (Note 7)
R
R
R
R
= 698Ω, 5V < V < 10V
●
●
1.9
0.35
320
40
2
2.1
0.45
480
A
A
FCH
FCL
PCH
PCL
BRD
PROG
PROG
PROG
PROG
CC
= 3480Ω, 4.5V < V < 10V
0.4
CC
= 698Ω, 4.5V < V < 10V
400
80
mA
mA
µA
V
CC
Low Precharge Current (Note 7)
= 3480Ω, 4.5V < V < 10V
120
CC
Battery Removal Detection Bias Current
Battery Removal Threshold Voltage (Note 8)
4.5V < V < 10V, V
= V – 0.4V
●
●
–450
1.95
–300
2.05
50
–160
2.15
CC
BAT
CC
V
V
V
V
Increasing, 4.5V < V < 10V
BR
CELL
CELL
CC
Battery Removal Threshold Hysteresis Voltage
(Note 8)
Decreasing
mV
BRH
V
V
V
Battery Overvoltage Threshold (Note 8)
V
V
V
Increasing, 4.5V < V < 10V
●
1.85
840
1.95
50
2.05
960
V
mV
mV
BOV
BOVH
FCQ
CELL
CELL
CELL
CC
Battery Overvoltage Threshold Hysteresis (Note 8)
Decreasing
Fast Charge Qualification Threshold Voltage
(Note 8)
Increasing, 4.5V < V < 10V
900
CC
V
Fast Charge Qualification Threshold Hysteresis
Voltage (Note 8)
V
V
Decreasing
50
mV
FCQH
CELL
V
V
Initial Delay Hold-Off Threshold Voltage (Note 8)
Increasing, 4.5V < V < 10V
1.24
1.3
50
1.36
V
IDT
CELL
CELL
CC
Initial Delay Hold-Off Threshold Hysteresis Voltage V
(Note 8)
Decreasing
mV
IDTH
V
V
V
V
V
V
V
–∆V Termination (Note 8)
CHEM = V (NiCd)
CHEM = 0V (NiMH)
●
●
11
5
16
8
21
14
mV
mV
MDV
PROG
ART
CC
Program Pin Voltage
4.5V < V < 10V, R
= 635Ω
●
●
●
1.45
1.065
1.235
1.5
1.1
1.3
50
1.54
1.135
1.365
V
CC
PROG
ARCT
ARCT
and 3480Ω
Automatic Recharge Programmed Threshold
Voltage Accuracy (Note 8)
V
Decreasing, V
= 1.1V,
V
CELL
4.5V < V < 10V
CC
Automatic Recharge Default Threshold Voltage
Accuracy (Note 8)
V
Decreasing, V
= V ,
CC
V
ARDT
ARH
CELL
4.5V < V < 10V
CC
Automatic Recharge Threshold Voltage Hysteresis
(Note 8)
V
Increasing
mV
V
CELL
Automatic Recharge Pin Default Enable Threshold
Voltage
V
V
CC
– 0.2
ARDEF
ARDIS
ARL
CC
– 0.8
Automatic Recharge Pin Disable Threshold
Voltage
250
650
mV
I
Automatic Recharge Pin Pull-Down Current
NTC Pin Cold Threshold Voltage
V
V
= 1.3V
●
●
0.15
1.5
µA
ARCT
V
Decreasing, 4.5V < V < 10V
0.83 •
0.86 •
0.89 •
V
CLD
NTC
CC
V
V
V
CC
CC
CC
V
V
NTC Pin Cold Threshold Hysteresis Voltage
V
V
Increasing
150
mV
V
CLDH
HTI
NTC
NTC
NTC Pin Hot Charge Initiation Threshold Voltage
Decreasing, 4.5V < V < 10V
●
0.47 •
0.5 •
0.53 •
CC
V
V
V
CC
CC
CC
4060f
3
LTC4060
The ● indicates specifications which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VBAT = 2.8V, GND = 0V unless otherwise specified. All
currents into the device pins are positive and all currents out of the device pins are negative. All voltages are referenced to GND
unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
100
MAX
UNITS
mV
V
V
NTC Pin Hot Charge Initiation Hysteresis Voltage
NTC Pin Hot Charge Cutoff Threshold Voltage
V
V
Increasing
HTIH
HTC
NTC
NTC
Decreasing, 4.5V ≤ V ≤ 10V
●
●
●
0.37 •
0.4 •
0.43 •
V
CC
V
V
V
CC
CC
CC
V
V
NTC Pin Hot Charge Cutoff Hysteresis Voltage
NTC Pin Disable Threshold Voltage
NTC Pin Pull-Down Current
V
Increasing
100
mV
mV
µA
%
HTCH
NDIS
NTC
25
250
1.5
15
I
t
V
= 2.5V
0.15
–15
NL
ACC
NTC
Timer Accuracy
R
PROG
R
PROG
= 698Ω, C
= 3480Ω, C
= 1.2nF and
= 470pF
0
TIMER
TIMER
Output Drivers
I
Drive Pin Sink Current
V
V
= 4V
40
70
120
mA
Ω
DRV
DRIVE
DRIVE
R
Drive Pin Resistance to V
= 4V, Not Charging
= 10mA
4700
DRV
OL
CC
V
ACP, CHRG Output Pins Low Voltage
I
= I
0.8
2
V
ACP
CHRG
I
ACP, CHRG Output Pins High Leakage Current
Outputs Inactive, V
= V
= V
CC
–2
µA
OH
CHRG
ACP
Control Inputs
V
SHDN, SEL0, SEL1, CHEM, PAUSE Pins Digital
Input Threshold Voltage
V
= 10V
350
650
mV
mV
µA
IT
CC
V
SHDN, SEL0, SEL1, CHEM, PAUSE Pins Digital
Input Hysteresis Voltage
50
ITH
IPD
IPU
I
I
SHDN, SEL0, SEL1, CHEM Pins Digital Input
Pull-Down Current
V
V
= 10V, V = V
0.4
–2
2
CC
IN
IN
CC
PAUSE Pin Digital Input Pull-Up Current
= GND
–0.4
µA
Note 1: Absolute Maximum Ratings only indicate limits for survivability.
Operating the device beyond these limits may result in permanent damage.
Continuous or extended application of these maximum levels may
adversely affect device reliability.
Note 2: The LTC4060 is guaranteed to meet performance specifications
from 0°C to 70°C ambient temperature range and 0°C to 85°C junction
temperature range. Specifications over the –40°C to 85°C operating
ambient temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Overtempera-
ture protection is activated at a temperature of approximately 145°C,
which is above the specified maximum operating junction temperature.
Continuous operation above the specified maximum operation temperature
may result in device degradation or failure. Operating junction temperature
Note 5: Assumes that the external PNP pass transistor has negligible B-C
reverse leakage current when the collector is biased at 2.8V (V for two
BAT
charged cells in series) and the base is biased at V
.
CC
Note 6: Assumes that the external PNP pass transistor has negligible B-E
reverse leakage current when the emitter is biased at 0V (V ) and the
CC
base is biased at 5.6V (V for four charged cells in series).
BAT
Note 7: The charge current specified is the regulated current through the
internal current sense resistor that flows into the external PNP pass
transistor’s emitter. Actual battery charging current is slightly less and
depends upon PNP alpha.
Note 8: Given as a per cell voltage (V /Number of Cells).
BAT
Note 9: Supply current includes the current programming resistor current
of 2mA. The charger is paused and not charging the battery.
Note 10: The minimum V supply is set at 5V during this test to
CC
compensate for voltage drops due to test socket contact resistance and 2A
of current. This ensures that the supply voltage delivered to the device
under test does not fall below the UVLO entry threshold. Specification at
T (in °C) is calculated from the ambient temperature T and the average
J
A
power dissipation P (in watts) by the formula:
D
T = T + θ • P
D
J
A
JA
the minimum V of 4.5V is assured by design and characterization.
CC
Note 4: Short duration drops below the minimum V specification of
CC
several microseconds or less are ignored by the undervoltage detection
circuit.
4060f
4
LTC4060
U W
TYPICAL PERFOR A CE CHARACTERISTICS
NiMH Battery Charging
Characteristics at 1C Rate
NiCd Battery Charging
Characteristics at 1C Rate
NiMH Battery Charging
Characteristics at C/2 Rate
1.60
1.55
1.50
1.45
1.40
1.35
1.70
1.65
1.60
1.55
1.7
1.6
1.5
1.4
T
= 25°C
T
= 25°C
T
= 25°C
A
A
A
–∆V TERMINATION
–∆V TERMINATION
–∆V TERMINATION
0
20
40
60
80
100 120 140
0
10
20
30
40
50
0
10
20
30
40
50
60
60
CHARGE TIME (MINUTES)
CHARGE TIME (MINUTES)
CHARGE TIME (MINUTES)
4060 G03
4060 G01
4060 G02
NiCd Battery Charging
Characteristics at C/2 Rate
I
FCH vs Temperature and
IFCL vs Temperature and
Supply Voltage
Supply Voltage
1.65
1.60
1.55
1.50
1.45
1.40
402
401
400
399
2.010
2.005
2.000
1.995
–∆V TERMINATION
V
CC
= 10V
V
= 10V
CC
V
= 4.5V
CC
V
CC
= 4.5V
398
1.990
–50 –25
0
25
50
75 100 125
0
20
40
60
80
100 120 140
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
CHARGE TIME (MINUTES)
4060 G06
4060 G04
4060 G05
IBRD vs Temperature and
Supply Voltage
VMDV vs Temperature and
Supply Voltage
tACC vs Temperature and
Supply Voltage
1.7
1.5
18
16
–260
V
= 10V
CC
NiCd
V
= 10V
CC
4.5V ≤ V ≤ 10V
CC
1.0
14
12
10
8
0.5
–300
V
= 4.5V
CC
V
= 4.5V
NiMH
0
CC
4.5V ≤ V ≤ 10V
CC
–0.5
–1.0
–1.5
R
TIMER
= 3480Ω
= 470pF
PROG
C
6
R
TIMER
= 698Ω
= 1.2nF
PROG
C
–340
4
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75
100 125
50
100 125
–50 –25
0
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
4060 G07
4060 G08
4060 G09
4060f
5
LTC4060
U
U
U
PI FU CTIO S
DRIVE (Pin 1): Base Drive Output for the External PNP
Pass Transistor. Provides a controlled sink current that
drives the base of the PNP. This pin has current limit
protection for the LTC4060.
SEL0, SEL1 (Pins 9, 10): Number of Cells Selection Logic
Input. For single cell, connect both pins to GND. For two
cells, connect SEL1 to GND and SEL0 to VCC. For three
cells, SEL1 connects to VCC and SEL0 to GND. For four
cells, connect both pins to VCC.
BAT(Pin2):BatteryVoltageSenseInputPin.TheLTC4060
usesthevoltageonthispintomonitorbatteryvoltageand
control the battery current during charging. An internal
resistor divider is connected to this pin which is discon-
nected when in shutdown or when no power is applied to
VCC.
NTC (Pin 11): Battery Temperature Input. An external NTC
thermistor network may be connected to NTC to provide
temperature-based charge qualification. Connecting NTC
to GND inhibits this function.
CHEM (Pin 12): Battery Chemistry Selection Logic Input.
When connected to a high level NiCd fast charge –∆V
terminationparametersareused. AlowlevelselectsNiMH
parameters.
SENSE(Pin3):ChargeCurrentSenseNodeInput. Current
from VCC passes through the internal current sense resis-
torandreappearsattheSENSEpintosupplycurrenttothe
external PNP emitter. The PNP collector provides charge
current directly to the battery.
ACP (Pin 13): Open-Drain Power Supply Status Output.
WhenVCC isgreaterthantheundervoltagelockoutthresh-
old, the ACP pin will pull to ground. Otherwise the pin is
high impedance. This output is capable of driving an LED.
TIMER(Pin4):ChargeTimerInput.Acapacitorconnected
between TIMER and GND along with a resistor connected
from PROG to GND programs the charge cycle timing
limits.
VCC (Pin 14): Power Input. This pin can be bypassed to
ground with a capacitance of 1µF.
SHDN (Pin 5): Active Low Shutdown Control Logic Input.
When pulled low, charging stops and the LTC4060 supply
current is minimized.
CHRG (Pin 15): Open-Drain Charge Indicator Status Out-
put. The LTC4060 indicates it is providing charge to the
battery by driving this pin to GND. If charging is paused or
suspended due to abnormal battery temperature, the pin
remains pulled to GND. Otherwise the pin is high imped-
ance. This output can drive an LED.
PAUSE(Pin6):PauseEnableLogicInput. Thechargercan
be paused, turning off the charge current, disabling termi-
nation and stopping the timer when this pin is high. A low
level will resume the charging process.
GND (Pin 16): Ground. This pin provides a ground for the
internal voltage reference and other circuits. All voltage
thresholds are referenced to this pin.
PROG (Pin 7): Charge Current Programming Input. Pro-
vides a virtual reference of 1.5V for an external resistor
(RPROG) tied between this pin and GND that programs the
battery charge current. The fast charge current will be 930
timesthecurrentthroughthisresistor. Thisvoltageisalso
usable as system voltage reference.
Exposed Pad (Pin 17): Thermal Connection. Internally
connected to GND. Solder to PCB ground for optimum
thermal performance.
ARCT (Pin 8): Autorecharge Threshold Programming
Input. When the average cell voltage falls below this
threshold, charging is reinitiated. The voltage on this pin
is conveniently derived by using two series PROG pin
resistors and connecting to their common. Connecting
ARCT to VCC invokes a default threshold of 1.3V. Connect-
ing ARCT to GND inhibits autorecharge.
4060f
6
LTC4060
W
BLOCK DIAGRA
14
V
CC
SEL0
SEL1
VOLTAGE
UVLO
REFERENCE
R1
R2
0.03Ω
31.5Ω
I
SENSE
CURRENT
DIVIDER
3
I/5
I
OSC
+
–
A2
1.5V
+
–
A1
V
CC
PROG
7
SUPPLY GOOD
R
PROG
COLD
HOT
OUTPUT DRIVER
AND
DRIVE
BAT
NTC
1
2
THERMISTOR
INTERFACE
11
CURRENT LIMIT
CUTOFF
I/5
IC
+
OVERTEMPERATURE
DETECT
I
CHRG
ACP
15
13
5
A/D
CHARGER STATE
CONTROL LOGIC
CONVERTER
SHDN
PAUSE
BATTERY
DETECTOR
6
I
OSC
I
BRD
AUTORECHARGE
DETECTOR
OSCILLATOR
GND
16, 17
CHEM SEL1
12 10
SEL0
TIMER
4
ARCT
8
4060 BD
9
C
TIMER
4060f
7
LTC4060
U
OPERATIO
The LTC4060 is a complete linear fast charging system for
NiMH or NiCd batteries. Operation can be understood by
referring to the Block Diagram, State Diagram (Figure 1)
and application circuit (Figure 2). While in the unpowered
sleep mode, the battery is disconnected from any internal
loading. The sleep mode is exited and the shutdown mode
is entered when VCC rises above the UVLO (Undervoltage
Lock Out) exit threshold. The UVLO thresholds are depen-
dent upon the number of series cells programmed by the
SEL0 and SEL1 pins. When shutdown occurs the ACP pin
goes from a high to low impedance state. The shutdown
mode is exited and the charge qualification mode entered
when all of the following conditions are met: 1) there is no
manual shutdown command from SHDN, 2) the battery
overvoltage detector does not detect a battery overvolt-
age, 3) the battery removal detector detects a battery in
place,4)pauseisinactiveand5)theIC’sjunctiontempera-
ture is normal. Once in the charge qualification mode the
thermistor interface monitors an optional thermistor net-
work to determine if the battery temperature is within
charging limits. If the temperature is found within limits
charging can begin. While charging, the CHRG pin pulls to
GND which can drive an LED.
MANUAL
SHUTDOWN
(SHDN = 0)
SUPPLY
GOOD
(ACP = 0)
BATTERY REMOVED,
BATTERY OVERVOLTAGE,
LOW OR NO
SLEEP
SHUTDOWN
CHARGE PERIOD TIMED
OUT OR IC TOO HOT
SUPPLY
ADEQUATE SUPPLY
AND CHARGER ENABLED
CHARGE
QUALIFICATION
BATTERY PRESENT AND
TEMPERATURE GOOD
(OPTIONAL)
V
< AUTORECHARGE
THRESHOLD
CELL
PRECHARGE
(I /5)
MAX
ADEQUATE V
TEMPERATURE GOOD
(OPTIONAL)
AND
CELL
–∆V TERMINATION
AUTOMATIC
RECHARGE
FAST CHARGE
(I
)
MAX
4060 F01
Figure 1. LTC4060 Basic State Diagram
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LTC4060
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OPERATIO
The charge current is set with an external current pro-
gramming resistor connected between the PROG pin and
GND.IntheBlockDiagram,amplifierA1willcauseavirtual
1.5V to appear on the PROG pin and thus, all of the pro-
grammingresistor’scurrentwillflowthroughtheN-channel
FET to the current divider. The current divider is controlled
by the charger state control logic to produce a voltage
acrossR1, appropriateeitherforprecharge(I/5)orforfast
charge (I), depending on the cell voltage. The current di-
vider also produces a constant current IOSC, that along
with an external capacitor tied to the TIMER pin, sets the
Oscillator’sclockfrequency. Duringcharging, theexternal
PNP transistor’s collector will provide the battery charge
current. The PNP’s emitter current flows into the SENSE
pin and through the internal current sense resistor R2
(0.03Ω). This current is slightly more than the collector
currentsinceitincludesthebasecurrent. AmplifierA2and
the output driver will drive the base of the external PNP
through the DRIVE pin to force the same reference voltage
that appears across R1 to appear across the R2. The pre-
cision ratio between R1 and R2, along with the current
programming resistor, accurately determines the charge
current.
The SHDN pin can be used to return the charger to a
shutdown and reset state. The PAUSE pin can be used to
pause the charge current and internal clocks for any
interval desired.
Fault conditions, such as overheating of the IC due to
excessive PNP base current drive, are monitored and
limited by the IC overtemperature detection and output
driver and current limit blocks.
When either VCC is removed or manual shutdown is
entered, the charger will draw only tiny leakage currents
from the battery, thus maximizing standby time. With VCC
removed, the external PNP’s base is connected to the
battery by the charger. In manual shutdown, the base is
connected to VCC by the charger.
Undervoltage Lockout
An internal undervoltage lockout circuit (UVLO) monitors
the input voltage and keeps the charger in the inactive
sleep mode until VCC rises above the undervoltage exit
threshold. The ACP pin is high impedance while in the
sleep mode and becomes low impedance to ground when
in the active mode. The threshold is dependent upon the
number of series cells selected by the SEL0 and SEL1 pins
(see VUVI1-3 and VUVD1-3 in the Electrical Characteristics
table).TheUVLOcircuithasabuilt-inhysteresisof100mV.
The thresholds are chosen to provide a minimum voltage
drop of approximately 600mV between minimum VCC and
BAT at a battery cell voltage of 1.8V. This helps to protect
against excessive saturation in the external power PNP
when the supply voltage is near its minimum. While
inactive the LTC4060 reduces battery current to just a
negligible leakage current (IBSL).
When charging begins, the charger state control logic will
enable precharge of the battery. When the cell voltage
exceedsthefastchargequalificationthreshold,fastcharge
begins. If the cell voltage exceeds the initial delay hold off
threshold voltage just prior to precharge, then the A/D
converter immediately monitors for a –∆V event to
terminate charging while in fast charge. Otherwise, the
fast charge voltage stabilization hold off period must
expire before the A/D converter monitors for a –∆V event
from which to terminate charging. The –∆V magnitude for
termination is selected for either NiMH or NiCd by the
CHEMpin.Shouldthebatterytemperaturebecometoohot
or too cold, charging will be suspended by the charger
state control logic until the temperature enters normal
limits. A termination timer puts the charger into shutdown
mode if the programmed time has expired. After charging
has ended, the optional autorecharge detector function
monitors for the battery voltage to drop to either a default
or externally programmed cell voltage before automati-
cally restarting a charge cycle.
Manual Shutdown Control
The LTC4060 can be forced into a low quiescent current
shutdown while VCC is present by applying a low level to
the SHDN pin. In manual shutdown, charging is inhibited,
the internal timer is reset and oscillator disabled, CHRG
status output is high impedance and ACP continues to
providethecorrectstatus. TheLTC4060willdrawlowcur-
rent from the supply (ISD), and only a negligible leakage
current is applied to the battery (IBSD). If a high level is
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LTC4060
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OPERATIO
appliedtotheSHDNpin, shutdownendsandchargequali-
If the internal die temperature becomes excessive, charg-
ing stops and the part enters the shutdown state. Once in
the shutdown state charge qualification can be reinitiated
only when the die temperature drops to normal and then
by removing and replacing the battery or toggling the
SHDN pin low to high or removing and reapplying power
to the charger.
fication is entered.
Charge Qualification
After exiting the sleep or shutdown modes the LTC4060
will check for the presence of a battery and for proper
battery temperature (if a thermistor is used) before initiat-
ing charging.
Precharge
When VCELL (VBAT/Number of Cells) is below 2.05V (VBR),
a battery is assumed to be present. Should VCELL rise
above 1.95V (VBOV) for a time greater than the battery
overvoltage event delay shown in the far right column of
Table 1, then a battery overvoltage condition is detected
and charging stops. Once stopped in this way, qualifica-
tion can be reinitiated after VCELL has fallen below 1.9V
(VBOV –VBOVH)onlybyremovingandreplacingthebattery
(or replacing the battery if the overvoltage condition is a
result of battery removal), toggling the SHDN pin low to
high or removing and reapplying power to the charger.
The state that is entered when qualified charging begins is
precharge. TheCHRGstatusoutputissetlowandremains
low during both precharge and fast charge. If the voltage
on VCELL is below the 900mV (VFCQ) fast charge qualifica-
tion voltage, the LTC4060 charges using one-fifth the
maximumprogrammedchargecurrent. Thecellvoltageis
continuously checked to determine when the battery is
ready to accept a fast charge. Until this voltage reaches
VFCQ, the LTC4060 remains in precharge.
If an external thermistor indicates that the sensed tem-
perature is beyond a range of 5°C to 45°C charging is
suspended, the charge timer is paused and the CHRG
status output remains low. Normal charging resumes
from the previous state when the sensed temperature
rises above 5°C or falls below 45°C.
If the NTC pin voltage is above the temperature disable
threshold (VNDIS), the LTC4060 verifies that the ther-
mistor temperature is between 5°C and 45°C. Charging
will not initiate until these temperature limits are met.
The LTC4060 continues to qualify important voltage and
temperature parameters during all charging states. If VCC
drops below the undervoltage lockout threshold, sleep
mode is entered.
Fast Charge
WhentheaveragecellvoltageexceedsVFCQ, theLTC4060
transitionsfromtheprechargetothefastchargestateand
Table 1. LTC4060 Time Limit Programming Examples
TYPICAL
FAST
CHARGE
RATE
BATTERY
VOLTAGE
STABILIZATION
HOLD OFF
CHARGE
TIME
LIMIT
BATTERY AUTOMATIC
VOLTAGE
SAMPLING
INTERVAL
RECHARGE
ENTRY
DELAY
UVLO EXIT, BATTERY
INSERTION/REMOVAL/OVERVOLTAGE,
FAST CHARGE ENTRY AND
FAST
CHARGE
CURRENT
(t
MAX
)
R
PROG
C
TIMER
(C)
(MINUTES)
(HOURS) (SECONDS) (SECONDS)
THERMISTOR EVENT DELAYS (ms)
2A
2A
698Ω
698Ω
1nF
1.5
1
4.6 to 5.7
6.9 to 8.4
8.4 to 10.3
12.6 to 15.4
4.2 to 5.2
6.3 to 7.7
8.9 to 11
1.1
1.6
2
15
23
28
42
14
21
30
42
15 to 31
23 to 46
28 to 56
42 to 84
14 to 28
21 to 42
30 to 60
42 to 84
175 to 260
260 to 390
320 to 480
480 to 720
160 to 240
240 to 360
340 to 510
480 to 720
1.5nF
1.8nF
2.7nF
180pF
270pF
390pF
560pF
2A
698Ω
0.75
0.5
1.5
1
2A
698Ω
3
400mA
400mA
400mA
400mA
3480Ω
3480Ω
3480Ω
3480Ω
1
1.5
2.1
3
0.75
0.5
12.6 to 15.4
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LTC4060
U
OPERATIO
charging begins at the maximum current set by the
external programming resistor connected between the
PROG pin and GND.
enabled, will automatically restart the charger from the
charge qualification state without user intervention when-
ever the battery cell voltage drops below a set level. With
the advent of low memory effect NiMH and improved NiCd
cells an automatic recharge feature is practical and elimi-
nates the need for very slow trickle charging.
If an external thermistor indicates sensed temperature is
beyond a range of 5°C to 55°C charging is suspended, the
charge timer is paused and the CHRG status output
remains low. Normal charging resumes from the previous
statewhenthesensedtemperaturerisesabove5°Corfalls
below 45°C. Voltage-based termination (–∆V) is then
reset and immediately enabled. If voltage-based termina-
tion was imminent when the temperature limits were
exceeded, charge termination will occur.
The CHRG status output is high impedance in the auto-
matic recharge state until charging begins. If the VCELL
voltage drops below the voltage set on the ARCT pin for at
least the automatic recharge entry delay time as shown in
Table 1, the charge qualification state is entered and
charging will begin anew in fast charge. An easy way of
setting the voltage on the ARCT pin is by using two series
currentprogrammingresistorsandconnectingtheircom-
mon to the ARCT pin as shown in Figure 2. The PROG pin
will provide a constant 1.5V (VPROG). The programmable
voltage range of the ARCT pin is approximately 0.8V to
Charge Termination
Once fast charge begins and after an initial battery voltage
stabilization hold-off period shown in Table 1, voltage-
based termination (–∆V) is enabled. This period is used to
prevent falsely terminating on a –∆V event that can occur
almost immediately after initiating charging on some
heavily discharged or stored batteries. However, if VCELL
was measured to be above 1.3V (VIDT) immediately prior
to the precharge cycle, then a mostly charged battery is
assumed and voltage-based termination (–∆V) is enabled
without delay.
1.6V.Apreprogrammedrechargethresholdof1.3V(VARDT
)
is selected when the ARCT pin is connected to VCC
(VARDEF). Automatic recharge is disabled when the ARCT
pin is connected to ground (VARDIS).
Pause
After charging is initiated, the PAUSE pin may be used to
pause operation at any time. Whenever the voltage on the
PAUSE pin is a logic high, the charge timer and all other
timers pause, charging is stopped and the fast charge ter-
mination algorithm is inhibited. The CHRG status output
remains at GND. If voltage-based termination was immi-
nentbeforepause,chargeterminationwilloccur.Otherwise,
when pause ends, the charge timer and all other timers
resumetiming,chargingrestartsandvoltage-basedtermi-
nation (–∆V) is reset and immediately enabled. If the bat-
tery is removed while the PAUSE pin is a logic high, then
batteryremovalisdetectedandshutdownisentered. Ifthe
battery is replaced while the PAUSE pin is a logic high, it
will not be detected until pause is turned off.
An internal 1.5mV resolution A/D converter measures the
cell voltage after each battery voltage sampling interval
indicated in Table 1. The peak cell voltage is stored and
comparedtothecurrentcellvoltage. Whenthecellvoltage
has dropped by at least VMDV (magnitude selected by the
CHEM pin) from the peak for four consecutive battery
voltage sampling intervals, charging is terminated.
Back-upterminationisprovidedbythechargetimelimiter,
whose time limit is indicated in Table 1, and by a battery
overvoltage detector. Once terminated by back-up termi-
nation,chargequalificationcanbereinitiatedonlybyremov-
ing and replacing the battery or toggling the SHDN pin low
to high or removing and reapplying power to the charger.
For pause periods or a series of periods where the battery
capacity could be significantly depleted, consider using
shutdowninsteadofpausetoavoidhavingthesafetytimer
expire before the battery can be fully charged. Shutdown
resets the safety timer.
Automatic Recharge
Once charging is complete, the optional programmable
automatic recharge state can be entered. This state, if
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LTC4060
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OPERATIO
Battery Chemistry Selection
Insertion and Removal of Batteries
Thedesiredbatterychemistryisselectedbyprogramming
the CHEM pin to the proper voltage. When wired to GND,
a set of parameters specific to charging NiMH cells is
selected. When CHEM is connected to VCC, charging is
optimizedforNiCdcells. Thevariouschargingparameters
are detailed in Table 2.
The LTC4060 automatically senses the insertion or re-
moval of a battery by monitoring the VCELL pin voltage.
Either the charge current, or if not charging then an
internal pull-up current (IBRD), will pull VCELL up when the
battery is removed. When this voltage rises above 2.05V
(VBR) for a time greater than the battery removal event
delayshowninTable1, theLTC4060considersthebattery
to be absent. Inserting a battery, causing VCELL to fall
below both VBR and 1.95V (VBOV) for a period longer than
the battery insertion event delay shown in Table 1, results
in the LTC4060 recognizing a battery present and initiates
a completely new charge cycle beginning with charge
qualification. All battery currents are inhibited while in
shutdown.
Cell Selection
The number of series cells is selected using the SEL0 and
SEL1 pins. For one cell, both pins connect to GND. For two
cells, SEL0 connects to VCC and SEL1 to GND. For three
cells, SEL0 connects to GND and SEL1 to VCC. For four
cells, both connect to VCC.
Table 2. LTC4060 Charging Parameters
STATE
CHEM
Both
CHARGE TIME LIMIT
T
T
I
CHRG
TYPICAL TERMINATION CONDITION
V ≥ 0.9V
CELL
MIN
MAX
Precharge
Fast Charge
t
t
t
5°C
5°C
5°C
45°C
55°C
55°C
I
/5
MAX
MAX
MAX
MAX
NiCd
I
I
–16mV Per Cell After Initial t
/12 Delay
MAX
MAX
MAX
NiMH
–8mV Per Cell After Initial t
/12 Delay
MAX
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Programming Charge Current
Under precharge conditions, the current is reduced to
20% of the fast charge value (IMAX).The LTC4060 is
designed for a maximum current of 2A. This translates to
a maximum PROG pin current of 2.15mA and a minimum
program resistor of 698Ω. Reduced accuracy at low
current limits the useful fast charge current to a minimum
of approximately 200mA. Errors in the charge current can
be statistically approximated as follows:
The battery charge current is set with an external program
resistor connected from the PROG pin to GND. The for-
mula for the battery fast charge current or IMAX is:
⎛ 1.5V ⎞
⎝RPROG
IMAX = I
• 930 =
• 930
⎟
(
)
⎜
PROG
⎠
or
One Sigma Error ≅ 7mA
1395
IMAX
RPROG
=
For best stability over temperature and time, 1% metal-
filmresistorsarerecommended.CapacitanceonthePROG
pin should be limited to about 75pF to insure adequate AC
phase margin for its amplifier.
where RPROG is the total resistance from the PROG pin to
ground. For example, if 1A of fast charge current is
required:
Different charge currents can be programmed by various
means such as by switching in different program resis-
tors. A voltage DAC connected through a resistor to the
PROG pin or a current DAC connected in parallel with a
1395
1A
RPROG
=
= 1.4k 1% Resistor
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APPLICATIO S I FOR ATIO
U
resistor to the PROG pin can also be used to program charge rates, are generally not recommended. Consult the
current. Note that this will alter the timer periods unless battery manufacturer for recommended periods.
alternate TIMER pin capacitors are also programmed
An external timing source can also be used to drive the
through an analog switch.
TIMER pin for precise or programmed control. The high
levelmustbebetween2.5VandVCCandthelowlevelmust
ThePROGpinprovidesareferencevoltageof1.5V(VPROG
)
that may be tapped for system use. Current loading on bebetween0Vand0.25V.Also,thedrivingsourcemustbe
PROG is multiplied by 930 and appears as increased IMAX. able to overdrive the internal current source and sink
This may be compensated by adjustment of RPROG. Total which is 5% of the current through RPROG
PROG pin current must be limited to 2.3mA otherwise
.
Battery Temperature Sensing
absolute maximum ratings will be exceeded. When the
LTC4060 is in the shutdown mode, the PROG pin is forced
to ground potential to save power.
Temperature sensing is optional in LTC4060 applications.
To disable temperature qualification of all charging opera-
tions, the NTC pin must be wired to ground. A circuit for
temperature sensing using a thermistor with a negative
Programming the Timer
All LTC4060 internal timing is derived from the internal temperature coefficient (NTC) is shown in Figure 2. Inter-
oscillatorthatisprogrammedwithanexternalcapacitorat nally derived VCC proportional voltages (VCLD, VHTI, VHTC
)
the TIMER pin. The time periods shown in Table 1 scale arecomparedtothevoltageontheNTCinputpintotestthe
directly with the timer period. The programmable safety temperature thresholds. The battery temperature is mea-
timer is used to put a time limit on the entire charge cycle sured by placing the thermistor close to the battery pack.
for the case when charging has not otherwise terminated. In Figure 2, a common 10k NTC thermistor such as a
Murata NTH4G series NTH4G39A103F can be used. RHOT
The time limit is programmed by an external capacitor at
should be a 1% resistor with a value equal to the value of
the TIMER pin and is also dependent on the current set by
thechosenNTCthermistorat45°C(VNTC =VHTI =0.5•VCC
theprogrammingresistorconnectedtothePROGpin. The
time limit is determined by the following equation:
typ). Another temperature may be chosen to suit the
battery requirements. The LTC4060 will not initiate a
tMAX (Hours) = 1.567 • 106 • RPROG (Ω) • CTIMER (F)
chargecycleorcontinuewithaprechargeifthevalueofthe
thermistor falls below 4.42k which is a temperature rising
tMAX (Hours)
1.567 •106 •RPROG (Ω)
to approximately 45°C. However, once fast charging is in
progress, it will not be stopped until the thermistor drops
below 3k which is a temperature rising to approximately
55°C (VNTC = VHTC = 0.4 • VCC typ). Once reaching this
charge cutoff threshold, charging is suspended until the
value of the thermistor rises above approximately 4.8k
(falling temperature) or approximately 43°C (45°C – 2°C
hysteresis at VCC = 5V) and then charging is resumed.
Hysteresisavoidspossibleoscillationaboutthetrippoints.
Note that the comparator hysteresis voltages are constant
and when VCC increases the signal level from the ther-
mistor increases thus making the temperature hysteresis
look smaller.
CTIMER (F) =
Some typical timing values are detailed in Table 1. The
timer begins at the start of a charge cycle. After the time-
out occurs, the charge current stops and the CHRG output
assumes a high impedance state to indicate that the
charging has stopped.
Excessively short time-out periods may not allow enough
time for the battery to receive full charge or may result in
premature –∆V termination due to too short a battery
voltagestabilizationhold-offperiod.Excessivelylongtime-
out periods may indicate too low a charge current which
may not allow voltage-based termination (–∆V) to work
properly. Time-out limits of less than 0.75 hour for faster
2C charge rates, or more than 3.5 hours for slower C/2
Duringsuspensionthechargecurrentisturnedoffandthe
safety timer is frozen. The LTC4060 is also designed to
suspend when the thermistor rises above 34k (falling
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APPLICATIO S I FOR ATIO
temperature) at approximately 0°C (5°C – 5°C hysteresis
at VCC = 5V) and then resume when the thermistor falls
below 27k (rising temperature) which will be approxi-
mately 5°C (VNTC = VCLD = 0.86 • VCC typ).
VCC Bypass Capacitor
A 1µF capacitor located close to the LTC4060 will usually
provideadequateinputbypassing.However,cautionmust
be exercised when using multilayer ceramic capacitors.
Because of the self-resonance and high Q characteristics
of some types of ceramic capacitors, along with wiring
inductance, high voltage transients can be generated
undersomeconditionssuchasconnectingordisconnect-
ing a supply input to a hot power source. To reduce the Q
and prevent these transients from exceeding the absolute
maximum voltage rating, consider adding about 1Ω of
resistance in series with the ceramic input capacitor.
Many thermistors with an RCOLD to RHOT ratio of approxi-
mately 7 will work. For lower power dissipation higher
values of thermistor resistance can be used. The Murata
NTH4G series offers resistances of up to 100k at 25°C.
It is important that the thermistor be placed in close
contact with the battery and away from the external PNP
pass transistor to avoid excessive temperature errors on
the sensed battery temperature. Furthermore, since VCC is
a high current path into the LTC4060, it is essential to
minimize voltage drops between the VCC supply pin and
the top of RHOT by Kelvin connecting RHOT directly to the
VCC pin.
BAT Bypass Capacitor
Thisoptionalcapacitor,connectedbetweenBATandGND,
can be used to help filter excessive contact bounce during
the battery monitoring or charging process. The value will
dependuponthecontactbounceopenduration,butistypi-
cally 10µF. Another purpose of this capacitor is to bypass
transient battery load events that might otherwise disrupt
monitoringorcharging.Shouldthebatteryconnectionsnot
be subject to excessive contact bounce or excessive bat-
tery voltage transients, then no BAT pin capacitor is re-
quired. The same caution mentioned above for the VCC by-
pass capacitor applies.
Power Requirements
The DC power input to the VCC pin must always be within
proper limits while charging a battery. Voltages beyond
the absolute maximum ratings may damage the charger
and voltages falling below the UVLO entry thresholds, as
programmed by the SEL0 and SEL1 pins, will likely cause
the charger to enter the shutdown state (when the UVLO
exitthresholdisexceededchargingwillbeginanew).While
the LTC4060 is designed to reject 60Hz or 120Hz supply
ripple,certainprecautionsarerequired.Theinstantaneous
ripple voltage must always be within the above mentioned
limits. Ripple voltage seen across the collector-base junc-
tion of the external PNP pass transistor will slightly modu-
late its beta and hence its base current. Since the emitter
current is precisely regulated by the LTC4060, any modu-
lation of base current will appear at the collector. This
slightly modulated battery charge current into a battery
will usually produce an insignificant modulation voltage at
the battery. However, if excessive wire impedance to the
batteryfromthePNPexists,thenitmaybehelpfultoKelvin
connect the BAT pin to a convenient point closest to the
batterytoreduceripplemagnitudeenteringtheLTC4060’s
battery monitoring circuits. The battery ground imped-
ance should also be managed to limit ripple voltage at the
BAT pin. Excessive ripple into the BAT pin may cause the
charger to deviate from specified performance.
External PNP Transistor
TheexternalPNPpasstransistormusthaveadequatebeta
and breakdown voltages, low saturation voltage and suf-
ficient power dissipation capability that may include heat
sinking.
To provide 2A of charge current with the minimum avail-
able base current drive of 40mA (IDRV min) requires a
minimum PNP beta of 50.
The transistor’s collector to emitter breakdown voltage
must be high enough to withstand the difference between
the maximum supply voltage and minimum battery volt-
age. Almost any transistor will meet this requirement.
Additionally, when no power is supplied to the charger
(VIN=0VandVSENSE=0V),thetransistor’semittertobase
breakdown voltage must be high enough to prevent a
leakage path at the maximum battery voltage while not
4060f
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APPLICATIO S I FOR ATIO
U
charging (the DRIVE pin is internally switched to the BAT
pin). Most transistors will meet this requirement as well.
power derating for elevated temperature operation. The
maximum power dissipation of the PNP when charging is:
With low supply voltages, the PNP saturation voltage
(VCESAT) becomes important. The VCESAT must be less
than the minimum supply voltage minus the maximum
voltagedropacrosstheinternalcurrentsenseresistorand
bond wires (approximately 0.08Ω) and maximum battery
voltage presented to the charger accounting for wire I • R
drops.
PD(MAX) (W) = IMAX(VDD(MAX) – VBAT(MIN)
)
V
DD(MAX) is the maximum supply voltage and VBAT(MIN) is
the minimum battery voltage when discharged, but not
less than 0.9V/cell since less than 0.9V/cell invokes
precharge current levels.
Thermal Considerations
V
CESAT (V)<VDD(MIN) –(IBAT(MAX) •0.08Ω+VBAT(MAX))
Internalovertemperatureprotectionisprovidedtoprevent
excessive LTC4060 die temperature during a fault condi-
tion. Iftheinternaldietemperatureexceedsapproximately
145°C, charging stops and the part enters the shutdown
state. The faults can be generated from insuffient heat
sinking, a shorted DRIVE pin or from excessive DRIVE pin
current to the base of an external PNP transistor if it’s in
deepsaturationfromaverylowVCE. Onceintheshutdown
state, charge qualification can be reinitiated only by re-
movingandreplacingthebatteryortogglingtheSHDNpin
low to high or removing and reapplying power to the
charger. This protection is not designed to prevent over-
heating of the PNP pass transistor. Indirectly though, self-
heating of the PNP thermally conducting to the LTC4060
can result in the IC’s junction temperature rising above
145°C, thuscuttingoffthePNP’sbasecurrent. Thisaction
willlimitthePNP’sjunctiontemperaturetosometempera-
ture well above 145°C. The user should insure that the
maximum rated junction temperature is not exceeded
underanynormaloperatingcondition.SeePackage/Order
Information for the θJA of the LTC4060 Exposed Pad
packages. The actual thermal resistance in the application
will vary depending on forced air cooling, use of the
Exposed Pad and other heat sinking means, especially the
amount of copper on the PCB to which the LTC4060 is
attached. The majority of the power dissipated within the
LTC4060 is in the current sense resitor and DRIVE pin
driver as given below:
For example, if it were desired to have a programmed
charge current of 2A with a minimum supply voltage of
4.75V and a maximum battery voltage of 3.6V (2 series
cellsat1.8Veach), thentheminimumoperatingVCESAT is:
VCESAT (V) = 4.75 – (2 • 0.08 + 3.6) = 0.99V
If the PNP transistor cannot achieve the saturation voltage
required, basecurrentwilldramaticallyincrease. Thisisto
be avoided for a number of reasons: DRIVE pin current
may reach current limit resulting in the LTC4060 charac-
teristics going out of specifications, excessive power
dissipation may force the IC into thermal shutdown, or the
battery could discharge because some of the current from
theDRIVEpincouldbepulledfromthebatterythroughthe
forward biased PNP collector base junction.
The actual battery fast charge current (IBAT) is slightly less
than the regulated charge current because the charger
senses the emitter current and the battery charge current
will be reduced by the base current. In terms of β (IC/IB)
IBAT can be calculated as follows:
⎛
⎞
⎟
β
IBAT (A) = 930 •IPROG
⎜
β + 1
⎝
⎠
If β = 100 then IBAT is 1% low. The 1% loss can be easily
compensated for by increasing IPROG by 1%.
Another important factor to consider when choosing the
PNP pass transistor is its power handling capability. The
transistor’sdatasheetwillusuallygivethemaximumrated
power dissipation at a given ambient temperature with a
PD = (IBAT)2 • 0.08 + IDRIVE (VCC – VEB)
TJ = TA + θJA • PD
VEB is the emitter to base voltage of the external PNP.
4060f
15
LTC4060
U
TYPICAL APPLICATIO S
Full Featured 2A Charger Application
Power Path Control
Figure 2 shows an application that utilizes the optional
temperature sensing and optional externally program-
mable automatic recharge features. It also has LEDs to
indicate charging status and the presence of sufficient
input supply voltage.
Proper power path control is an important consideration
when fast charging nickel cells. This control ensures the
system load remains powered at all times, but that normal
system operation and associated load transients do not
adversely affect the charging procedure. Figure 3 illus-
trates a 1A charger with power path control. When VIN is
applied the forward biased Schottky diode will power the
load while the P-channel FET will disconnect the battery
from the load. When VIN is removed, the FET will turn-on
to provide a low loss switch from the battery to the load,
and the diode will isolate VIN. The ACP output signals the
presense of VIN.
The PROG pin has a total resistance of 691Ω to ground
thatprogramsthefast-chargecurrentatthePNP’semitter
to2.02A(2Aatthecollectorforbetaof100). TheARCTpin
voltage is programmed to 1.25V. When the battery cell
voltage falls below this automatic recharge will begin.
Optional capacitor CBAT filters excessive contact bounce.
This circuit can be modified to charge a 4A-Hr battery at a
C/2 rate simply by doubling the CTIMER capacitance.
V
= 5V
IN
R
LED
14
CC
330Ω
R
R
LED
330Ω
HOT
V
4.42k
“AC”
5
15
11
13
3
SHDN
ACP
“CHARGE”
CHRG SENSE
1
NTC
DRIVE
MJD210
LTC4060
7
8
2
R
NTC
PROG
ARCT
SEL0
SEL1
BAT
TIMER
CHEM
PAUSE
+ 2-CELL
NiMH
BATTERY
10k
C
4
R
BAT
PROG
10µF
115Ω
9
12
6
C
TIMER
R
10
ARCT
1.5nF
576Ω
GND
4060 F02
16
Figure 2. Full Featured 2A Charger Application
V
= 5V
IN
B220A
R
R
LED
AC
V
330Ω
CC
10k
5
15
11
13
3
SHDN
ACP
ACP
“CHARGE”
CHRG SENSE
1
FDG312P
NTC
DRIVE
FZT948
LTC4060
7
8
2
PROG
ARCT
SEL0
SEL1
BAT
TIMER
CHEM
PAUSE
TO LOAD
+ 2-CELL
NiMH
BATTERY
R
PROG
4
C
LOAD
1400Ω
10µF
*
9
12
6
4060 F03
10
C
TIMER
820pF
GND
*DRAIN SOURCE DIODE OF MOSFET
16
Figure 3. 1A Charger Application with Power Path Control
4060f
16
LTC4060
U
TYPICAL APPLICATIO S
Trickle Charge
resistance and mismatches in the two sense resistor’s
value will cause charge current variability to increase in
proportion to the extension in current. Resistor RISET
should be connected directly to the LTC4060 to reduce
errors.Thetotalcurrentsenseresistor,bondwireandlead
frameresistanceisapproximately0.08Ω(T.C.≅3500ppm/
°C). The formula for extended fast charge current is:
The trickle charge function is normally not required due to
the automatic recharge feature. However, the LTC4060
does provide a modest pull-up current (IBRD) as part of its
battery removal detection method. If additional current is
required for trickle charge or to support battery removal
detection with current loads greater than IBRD, then the
simple circuit of Figure 4 will facilitate that. The diode
insuresnoreversedischargecurrentwhenVIN isremoved
and the resistor sets the trickle current.
⎛
0.08 ⎞
I
MAX(EXT) = IMAX • 1+
⎜
⎟
⎝
RISET
⎠
= 2A •1.5 = 3A
Extending Charge Current
for RISET = 0.16Ω and RPROG = 698Ω.
Extending the charge current beyond 2A can be accom-
plished by paralleling an external current sense resistor,
Adequate PNP beta is required to meet the DRIVE pin
capability and the increased PNP power dissipation will
require additional heat sinking.
R
ISET, with the internal current sense resistor as shown in
Figure 5. Bond wire, lead frame and PCB interconnect
V
1N4001
IN
14
V
CC
LTC4060
SENSE
3.3k
3
1
2
DRIVE
BAT
+
2-CELL
NiMH
BATTERY
4060 F04
Figure 4. Adding Trickle Charge
V
IN
14
R
ISET
0.16Ω
V
CC
0.08Ω
3
SENSE
DRIVE
BAT
1
2
+
2-CELL
NiMH
LTC4060
BATTERY
4060 F05
Figure 5. Extended Charge Current Operation
4060f
17
LTC4060
U
TYPICAL APPLICATIO S
Reverse Input Voltage Protection
*
LTC4060
14
V
IN
V
CC
In some applications protection from reverse supply volt-
age is desired. If the supply voltage is high enough, a
series blocking diode can be used. In other cases, where
the voltage drop must be kept very low, a P-channel FET
as shown in Figure 6 can be used.
4060 F06
*DRAIN BULK DIODE OF MOSFET
Figure 6. Low Loss Reverse Input Voltage Protection
4060f
18
LTC4060
U
PACKAGE DESCRIPTIO
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706)
0.65 ±0.05
3.50 ±0.05
1.65 ±0.05
2.20 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
4.40 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
0.40 ± 0.10
5.00 ±0.10
(2 SIDES)
9
16
R = 0.20
TYP
3.00 ±0.10 1.65 ± 0.10
(2 SIDES)
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16) DFN 1103
8
1
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
4.40 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
4060f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LTC4060
U
PACKAGE DESCRIPTIO
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BC
4.90 – 5.10*
(.193 – .201)
3.58
(.141)
3.58
(.141)
16 1514 13 12 1110
9
6.60 ±0.10
4.50 ±0.10
2.94
(.116)
6.40
(.252)
BSC
SEE NOTE 4
2.94
(.116)
0.45 ±0.05
1.05 ±0.10
0.65 BSC
5
7
8
1
2
3
4
6
RECOMMENDED SOLDER PAD LAYOUT
1.10
(.0433)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0° – 8°
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
0.195 – 0.30
FE16 (BC) TSSOP 0204
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1732
Lithium-Ion Linear Battery Charger Controller
Simple Charger uses External FET, Features Preset Voltages, C/10
Charger Detection and Programmable Timer, Input Power Good Indication
LTC1733
LTC1734
LTC1734L
LTC1998
Monolithic Lithium-Ion Linear Battery Charger
Lithium-Ion Linear Battery Charger in ThinSOTTM
Lithium-Ion Linear Battery Charger in ThinSOT
Lithium-Ion Low Battery Detector
Standalone Charger with Programmable Timer, Up to 1.5A Charge Current
Simple ThinSOT Charger, No Blocking Diode, No Sense Resistor Needed
Low Current Version of LTC1734; 50mA ≤ I
≤ 180mA
CHRG
1% Accurate 2.5µA Quiescent Current, SOT-23
LTC4006/LTC4007 4A Multicell Li-Ion Battery Chargers
Standalone Charger, 6V ≤ V ≤ 28V, Up to 96% Efficiency,
IN
±0.8% Charging Voltage Accuracy
LTC4008
LTC4052
LTC4053
LTC4054
4A Multichemistry Battery Charger
Synchronous Operation for High Efficiency, AC Adapter Current Limit
No Blocking Diode or External Power FET Required, ≤1.5A Charge Current
Standalone Charger with Programmable Timer, Up to 1.25A Charge Current
Monolithic Lithium-Ion Battery Pulse Charger
USB Compatible Monolithic Li-Ion Battery Charger
Standalone Linear Li-Ion Battery Charger
in ThinSOT
Thermal Regulation Prevents Overheating, C/10 Termination,
C/10 Indicator, Up to 800mA Charge Current
LTC4055
USB Power Controller and Li-Ion Battery Charger
Charges Directly from USB or Wall Adapter, New Topology Charges Faster and
More Efficiently
LTC4058
Standalone Li-Ion Linear Charger in DFN
Up to 950mA Charge Current, Kelvin Sense for High Accuracy,
C/10 Charge Termination
LTC4058X
LTC4411
LTC4412
Low Loss PowerPathTM Controller in ThinSOT
Automatic Switching Between DC Sources, Load Sharing,
Replaces ORing Diodes
ThinSOT and PowerPath are trademarks of Linear Technology Corporation.
4060f
LT/TP 0904 1K • PRINTED IN THE USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
©LINEAR TECHNOLOGY CORPORATION 2004
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